N. Hema ¹, Jayaraj U. Kidav ², B. Lakshmi ¹

Affiliations
1 SENSE Department, VIT University, Chennai - 600127, Tamil Nadu, IN
2 Department of VLSI Design, NIELIT, Calicut University, Calicut - 673635, Kerala, IN

Abstract

Background/Objectives: The main objective of this proposed work is to investigate the significance of adaptive beamforming technique and to develop an efficient VLSI architecture for broadband MVDR beamformer in the field of medical ultrasound imaging. Methods/Statistical Analysis: The proposed algorithm is Minimum Variance Distortionless Response (MVDR) for near field beamforming of broadband data which gives better contrast and resolution compared to conventional Delay and Sum (DAS) beamformers and is implemented in frequency domain. MVDR beamformer minimizes the output power by allowing the desired signal to pass undistorted with unity gain. The solution for this optimization problem, involves correlation matrix inversion, which is the challenging part of MVDR algorithm. Findings: MVDR algorithm is applied by finding the inverse of correlation matrix which is a complex matrix. Here four elements are used for simplicity. Calculation of inverse complex matrix is the challenging part of MVDR algorithm where different methods are being used. Here QR decomposition is used which follows givens rotation algorithm. The paper demonstrates the formal verification of the proposed work. Final result is compared with the golden reference model which is designed using FIELD II scanner in Matlab. From the results it’s seen that, MVDR beamformer gives a pencil like beamform which shows high resolution and better contrast when compared to DAS. The timing constraints and device utilization parameters are obtained from synthesis report of final architecture designed in FPGA. Conclusion/Improvements: MVDR algorithm gives a pencil like beamformer output with reduced main lobe width and reduced side lobe level. By upgrading number of elements from 4 to 64, it can be made real time.

Keywords

Broadband, Correlation Matrix, DAS, MVDR Beamformer

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S. K. Koushik ¹, B. Lakshmi ¹

Affiliations
1 School of Electronics Engineering, VIT University, Chennai-600127, IN

Abstract

Background: In all electronic based applications, memory design is crucial which decides the performance of the system. In present technology nodes reliability is a growing concern where the static SRAM memories are not able to store the contents for a longer period of time. Reliability is mainly due to aging degradation which characterises BTI (Bias Temperature Instability) and HCI (Hot Carrier Injection) resulting in permanent damage to MOS parameters and as a result MOS deviates slightly from its normal behaviour. Method: In order to maintain the performance of SRAM within considerable PVT (Process Voltage Temperature) boundaries over a period of time, all the six MOSFETs strength should be dynamically adjusted. So that the ground bounce can be minimised at critical nodes of the bit-cell and stability can be maintained. Findings: In this paper, statistical analysis is performed on 14nm designed 6T-SRAMs and various Shmoo -plots have been developed for different PVTs considering aging impact for a span of 10 years. Analysis was performed for both SRAM read and write operation. All simulations were carried out using HSPICE-2013 version and aging models of MOSRA level-3 version 103.1. Conclusion: From the analysis it clearly evident that read is slightly degraded by 15%-25% were the operating voltage ranges has been degraded. In this design core voltage has been increased from 0.96v to 1.08v and periphery voltage from 0.5v to 0.62v. Thus to ensure the same performance after 10 years the operational voltage has to be increased by 20%.

Keywords

Aging and FINFET, 6T-SRAM

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S. Poorvasha ¹, M. Pown ¹, B. Lakshmi ¹

Affiliations
1 School of Electronics Engineering, VIT University, Chennai – 600127, Tamil Nadu, IN

Abstract

Objectives: This paper presents the review of Tunnel FET (TFET) to overcome the major challenges faced by the conventional MOSFET. Analysis: Various device structures and characteristics of TFET along with different material and doping to improve efficiency are discussed in detail. In recent years, TFET seems to be an attractive device for analog/ mixed-signal applications due to their advantages such as high ON current (I_ON), low leakage current (I_OFF), reduced values of threshold voltage (V_T) and low Subthreshold Swing (SS).

Keywords

Asymmetric Gate Oxide, Band-to-Band Tunneling, Double Gate, Gate on Drain Overlap, Subthreshold Swing, Tunnel FET.

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